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General discussionHow Does The Timing Work On Skylake Processors?(3 posts)solved(3 posts)solved
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Posted January 08, 2016
It's been a little while since I built a computer. Back in the day, I'd have a FSB speed, and then you get RAM that had a speed that was a multiplier.

I guess you don't do that anymore. I picked up a G4400 and DDR4 2133MHz RAM. All of the Skylake processors are listed as "100MHz" FSB on spec sites I saw.

So how do these work now?

Do they just absorb as much data as they can through their L1-3 caches, so they don't need a high FSB? Do they automatically respond to the memory's speed?

I couldn't find info on the net, but I figured one of you smart folk could educate me.

Thanks!
This question / problem has been solved by OneFiercePuppyimage
Posted January 08, 2016
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Tallima: So how do these work now?
Well, if you've already looked at the wikipedia page for the Skylake architecture and that doesn't clear it up, you could try something like this Ars Technica article (sixth paragraph of the second section, specifically). The short of it is that it still works the same - base speed times clock multiplier.

Is that not what you're asking? Sometimes I think I know what the question is, and am wrong :P

EDIT: Heh. I said "plus clock multiplier" like that's how multiplication works.

MORE EDITING: I should point out that 100MHz has been a sort of default speed for front-side buses for more than 15 years, so your throughput isn't bottlenecked by that hundred million cycles per second, it's bottlenecked by CPU pipeline and off-die data transfers, mostly.

LAST EDIT THIS POST, PROMISE: While old, this link is still accurate and should answer your questions about bus speed and interactions with RAM, CPU, or anything else.
Post edited January 08, 2016 by OneFiercePuppy
Posted January 08, 2016
avatar
Tallima: So how do these work now?
avatar
OneFiercePuppy: Well, if you've already looked at the wikipedia page for the Skylake architecture and that doesn't clear it up, you could try something like this Ars Technica article (sixth paragraph of the second section, specifically). The short of it is that it still works the same - base speed times clock multiplier.

Is that not what you're asking? Sometimes I think I know what the question is, and am wrong :P

EDIT: Heh. I said "plus clock multiplier" like that's how multiplication works.

MORE EDITING: I should point out that 100MHz has been a sort of default speed for front-side buses for more than 15 years, so your throughput isn't bottlenecked by that hundred million cycles per second, it's bottlenecked by CPU pipeline and off-die data transfers, mostly.

LAST EDIT THIS POST, PROMISE: While old, this link is still accurate and should answer your questions about bus speed and interactions with RAM, CPU, or anything else.
I see. Thanks! It's all about these mysterious multipliers. The http://www.directron.com/fsbguide.html#part4 article was very, very useful. I can't wait to play with my new chip! :)

Thanks a lot!
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General discussionHow Does The Timing Work On Skylake Processors?(3 posts)solved(3 posts)solved
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